A Low Cost VLSI Architecture for Spike Sorting Based on Feature Extraction with Peak Search

Yuan-Jyun Chang, Wen-Jyi Hwang, Chih-Chang Chen

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DOI: 10.3390/s16122084
Published: 2016-12-07
Container: Sensors
Publisher: MDPI AG
Open access: unknown

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Cite this work

BibTeX

@article{allodium:10.3390/s16122084,
  title = {A Low Cost VLSI Architecture for Spike Sorting Based on Feature Extraction with Peak Search},
  author = {Yuan-Jyun Chang and Wen-Jyi Hwang and Chih-Chang Chen},
  year = {2016},
  journal = {Sensors},
  doi = {10.3390/s16122084},
  url = {https://doi.org/10.3390/s16122084}
}

RIS

TY  - JOUR
TI  - A Low Cost VLSI Architecture for Spike Sorting Based on Feature Extraction with Peak Search
AU  - Yuan-Jyun Chang
AU  - Wen-Jyi Hwang
AU  - Chih-Chang Chen
PY  - 2016
JO  - Sensors
DO  - 10.3390/s16122084
UR  - https://doi.org/10.3390/s16122084
ER  -

APA

Chang, Y., Hwang, W., & Chen, C. (2016). A Low Cost VLSI Architecture for Spike Sorting Based on Feature Extraction with Peak Search. Sensors. https://doi.org/10.3390/s16122084

Source records

crossref · retrieved 2026-11-10T07:51:57.872Z