Analysis of Chip Electronic Components' Typical Yield in Taping Process Based on Virtual Metrology.
- DOI
- 10.3390/s26082292
- Published
- 2026 Apr 8
- Container
- Sensors (Basel, Switzerland)
- Publisher
- Not recorded
- Open access
- yes
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Cite this work
BibTeX
@article{allodium:10.3390/s26082292,
title = {Analysis of Chip Electronic Components' Typical Yield in Taping Process Based on Virtual Metrology.},
author = {Zhang S and Chen L and Fu J and Yang C and Chen G},
year = {2026},
journal = {Sensors (Basel, Switzerland)},
doi = {10.3390/s26082292},
url = {https://doi.org/10.3390/s26082292}
}RIS
TY - JOUR TI - Analysis of Chip Electronic Components' Typical Yield in Taping Process Based on Virtual Metrology. AU - Zhang S AU - Chen L AU - Fu J AU - Yang C AU - Chen G PY - 2026 JO - Sensors (Basel, Switzerland) DO - 10.3390/s26082292 UR - https://doi.org/10.3390/s26082292 ER -
APA
S, Z., L, C., J, F., C, Y., & G, C. (2026). Analysis of Chip Electronic Components' Typical Yield in Taping Process Based on Virtual Metrology.. Sensors (Basel, Switzerland). https://doi.org/10.3390/s26082292
Source records
- pubmed · retrieved 2026-09-25T05:13:41.212Z