Power Optimization Techniques In Fpga Devices: A Combination Of System- And Low-Levels
- DOI
- 10.5281/zenodo.1070854
- Published
- 2007
- Container
- Not recorded
- Publisher
- Zenodo
- Open access
- yes
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Cite this work
BibTeX
@article{allodium:10.5281/zenodo.1070854,
title = {Power Optimization Techniques In Fpga Devices: A Combination Of System- And Low-Levels},
author = {Czapski, Pawel P. and Sluzek, Andrzej},
year = {2007},
doi = {10.5281/zenodo.1070854},
url = {https://doi.org/10.5281/zenodo.1070854}
}RIS
TY - JOUR TI - Power Optimization Techniques In Fpga Devices: A Combination Of System- And Low-Levels AU - Czapski, Pawel P. AU - Sluzek, Andrzej PY - 2007 DO - 10.5281/zenodo.1070854 UR - https://doi.org/10.5281/zenodo.1070854 ER -
APA
P., C. P., & Andrzej, S. (2007). Power Optimization Techniques In Fpga Devices: A Combination Of System- And Low-Levels. https://doi.org/10.5281/zenodo.1070854