Strained Silicon Layer in CMOS Technology

Tatjana Pešić-Brđanin, Branko L. Dokić

Open source

DOI: 10.7251/els1418063p
Published: 2014-12-31
Container: Electronics ETF
Publisher: Faculty of Electrical Engineering, University of Banja Luka
Open access: unknown

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Cite this work

BibTeX

@article{allodium:10.7251/els1418063p,
  title = {Strained Silicon Layer in CMOS Technology},
  author = {Tatjana Pešić-Brđanin and Branko L. Dokić},
  year = {2014},
  journal = {Electronics ETF},
  doi = {10.7251/els1418063p},
  url = {https://doi.org/10.7251/els1418063p}
}

RIS

TY  - JOUR
TI  - Strained Silicon Layer in CMOS Technology
AU  - Tatjana Pešić-Brđanin
AU  - Branko L. Dokić
PY  - 2014
JO  - Electronics ETF
DO  - 10.7251/els1418063p
UR  - https://doi.org/10.7251/els1418063p
ER  -

APA

Pešić-Brđanin, T., & Dokić, B. L. (2014). Strained Silicon Layer in CMOS Technology. Electronics ETF. https://doi.org/10.7251/els1418063p

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crossref · retrieved 2026-09-25T11:10:26.122Z