Arithmetical Built-In Self Test for DSP architectures

Radecka, Katarzyna.

DOI: 10.82308/29346
Published: 1997
Container: Not recorded
Publisher: McGill University
Open access: no

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Cite this work

BibTeX

@article{allodium:10.82308/29346,
  title = {Arithmetical Built-In Self Test for DSP architectures},
  author = {Radecka, Katarzyna.},
  year = {1997},
  doi = {10.82308/29346},
  url = {https://doi.org/10.82308/29346}
}

RIS

TY  - JOUR
TI  - Arithmetical Built-In Self Test for DSP architectures
AU  - Radecka, Katarzyna.
PY  - 1997
DO  - 10.82308/29346
UR  - https://doi.org/10.82308/29346
ER  -

APA

Katarzyna., R. (1997). Arithmetical Built-In Self Test for DSP architectures. https://doi.org/10.82308/29346

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datacite · retrieved 2026-11-09T16:37:56.371Z