A -85dBc reference spurs quadratude 1-2.5GHz dual-path sampled loop filter CMOS PLL with sub-1°rms phase noise
- Type
- Retraction
- Notice date
- 7/11/2006 0:00
- Journal
- 2006 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium
- Publisher
- IEEE: Institute of Electrical and Electronics Engineers
- Notice DOI
- 10.1109/rfic.2006.1651122
- Original paper DOI
- 10.1109/rfic.2006.1651122