A 0.13 µm CMOS DBS Demodulator Front-end Using a 250MS/s 8 bit Time Interleaved Pipeline ADC
- Type
- Retraction
- Notice date
- 3/5/2008 0:00
- Journal
- 2008 IEEE Radio and Wireless Symposium
- Publisher
- IEEE: Institute of Electrical and Electronics Engineers
- Notice DOI
- 10.1109/rws.2008.4463426
- Original paper DOI
- 10.1109/rws.2008.4463426