Retraction notices

Browse by reason

• A Low Reference Spurs 1–5 GHz 0.13 µm CMOS Frequency Synthesizer Using a Fully-Sampled Feed-Forward Loop Filter Architecture11/1/2007 0:00
• Zero-Second-IF SiGe BiCMOS Satellite Radio Tuner Using a Dual RF/IF AGC Loop10/8/2007 0:00
• 0.13µ CMOS hybrid TV tuner using a calibrated image and harmonic rejection mixer10/8/2007 0:00
• A 3.3 V 12.5 Gb/s 0.2 µ m SiGe BiCMOS Laser Diode Driver Using Bias Current Modulation Cancellation10/1/2007 0:00
• A 54 dBOmega + 42 dB 10 Gb/s SiGe transimpedance-limiting amplifier using bootstrap photodiode capacitance neutralization and vertical threshold adjustment9/1/2007 0:00
• Single and Dual Loop Ring Oscillator Based Frequency Synthesizers for Broadband Tuner Applications7/2/2017 0:00
• A 10GHz low phase noise 0.13 mu m CMOS LC-VCO for mixed signal SoCs using noise rejection caged inductors7/2/2007 0:00
• A Fully-Integrated Single-Conversion SiGe BiCMOS Satellite LNB Front-End Using a Constant-Gain Full-Rate Oscillator4/23/2007 0:00
• A -5OdBc Spur 0.13µm CMOS Ring Oscillator PLL for DBS Satellite Receiver SOCs Using a Multi-Regulator Architecture4/23/2007 0:00
• A 10GHz 0.11µm CMOS Varactor-less LC-VCO for Multi-Standard 802.11a/b/g WLAN Using High Resolution Frequency Calibration4/24/2007 0:00
• Fully-Integrated 0.13 µm CMOS Digital Low-IF DVB-S/S2 Satellite TV Tuner Using a Discrete-Step AGC Loop4/23/2007 0:00
• A Varactor-Less 10GHz CMOS LC-VCO for Optical Communications Transceiver SOCs Using Caged Inductors2/26/2007 0:00
• Low Voltage 12.5Gb/s SiGe BiCMOS Laser Diode Driver Using a Bias Current Modulation Canceling Technique2/26/2007 0:00
• 9.75/10.6GHz SiGe PLL for LNB Satellite Front-Ends Using Half-Rate Oscillators2/20/2007 0:00
• A 10.7GHz SiGe BICMOS limiting amplifier using multiple offset cancellation loops1/10/2006 0:00
• 9.953-12.5GHz 0.13µm CMOS LC VCO using a high resolution calibration and a constant gain varactor1/10/2006 0:00
• A 12.5Gb/s electro-absorption-modulator driver using a cascode switch with dynamic biasing and adaptive RC compensation12/12/2005 0:00
• A 12.5GHz SiGe BICMOS limiting amplifier using a dual offset cancellation loop12/5/2005 0:00
• A 9.953/10.7/12.5 GHz 0.13 µm CMOS LC oscillator using capacitor calibration and a V/sub GS//R based low noise regulator8/8/2005 0:00
• A sub-1ps/sub rms/ jitter 1-5GHz 0.13 µm CMOS PLL using a passive feedforward loop filter with noiseless resistor multiplication [frequency synthesizer application]8/8/2005 0:00
• A 3.3V 10Gb/s SiGe limiting transimpedance amplifier using a pseudo-differential input and a limiting Cherry-Hooper stage8/8/2005 0:00
• A -86dBc reference spurs 1-5GHz 0.13µm CMOS PLL using a dual-path sampled loop filter architecture7/25/2005 0:00
• Cooperation between subunits is essential for high-affinity binding of N-acetyl-D-hexosamines to dimeric soluble and dimeric cellular forms of human CD694/15/2014 0:00
• Multiple Period-doubling Bifurcation Route to Chaos in Periodically Pulsed Murali-Lakshmanan-Chua Circuit-controlling and Synchronization of Chaos9/14/2010 0:00
• A multi-rate 9.953-12.5GHz 0.2µm SiGe BICMOS LC oscillator with -120dBc/Hz phase noise at 1MHz offset using a variable resistor based varactor7/25/2005 0:00
• A 0.16-2.55-GHz CMOS active clock deskewing PLL using analog phase interpolation1/3/2005 0:00
• A 2-5GHz low jitter 0.13 µm CMOS PLL using a dynamic current matching charge-pump and a noise attenuating loop-filter [frequency synthesizer application]11/22/2004 0:00
• A 10GHz SiGe OC192 frequency synthesizer using a passive feed-forward loop filter and a half rate oscillator11/15/2004 0:00
• A 10Gb/s SiGe transimpedance amplifier using a pseudo-differential input stage and a modified Cherry-Hooper amplifier10/25/2004 0:00
• A low voltage 10Gbps SiGe laser diode driver using adaptive RC compensation and common-mode feedback based current generators10/25/2004 0:00
• A 160-2550MHz CMOS active clock deskewing PLL using analog phase interpolation9/13/2004 0:00
• A Fully-Integrated 0.11µm CMOS Digital Low-IF DVB-S2 Satellite TV Dual Tuner SOC10/10/2005 0:00
• A Dual Channel DVB-S/S2 Direct-Conversion Satellite TV Tuner with On-Chip ADCs and Multiple DC Offset Cancellation Loops2/1/2008 0:00
• A Field Experiment Comparing the Outcomes of Three Fraud Brainstorming Procedures: Nominal Group, Round Robin, and Open Discussion1/1/2013 0:00
• CT features of bladder small cell carcinoma11/11/2006 0:00
• The Relationship between Perceived Tone at the Top and Earnings Quality12/1/2014 0:00
• The Dark Side of Online Knowledge Sharing6/25/2015 0:00
• The Impact of Alternative Telework Arrangements on Organizational Commitment: Insights from a Longitudinal Field Experiment6/25/2015 0:00
• Extending the Accounting Brand to Privacy Services6/25/2015 0:00
• Behavioral Self-Regulation of Telework Locations: Interrupting Interruptions6/25/2015 0:00
• The Reaction of Financial Analysts to Enterprise Resource Planning (ERP) Implementation Plans6/25/2015 0:00
• Investigating the Impact of Auditor-Provided Systems Reliability Assurance on Potential Service Recipients6/25/2015 0:00
• Are Financial Auditors Overconfident in Their Ability to Assess Risks Associated with Enterprise Resource Planning Systems6/25/2015 0:00
• Hierarchical and Gender Differences in Private Accounting Practice9/1/2015 0:00
• Does Graduate Business Education Contribute to Professional Accounting Success?9/1/2015 0:00
• Adoptively Transferred ex Vivo Activated Memory T Cells with Cyclophosphamide: Effective Tumor-Specific Chemoimmunotherapy of Advanced Metastatic Murine Melanoma and Carcinoma6/1/1998 0:00
• Is Analyst Forecast Accuracy Associated With Accounting Information Use9/1/2015 0:00
• Performance of Accountants in Private Industry: A Survival Analysis9/1/2015 0:00
• Sampling Practices of Auditors in Public Accounting, Industry, and Government9/2/2015 0:00
• Does the Form of Management’s Earnings Guidance Affect Analysts’ Earnings Forecasts6/25/2015 0:00

First page · Next